招聘人数:7 人
到岗时间:1个月之内
婚况要求:不限婚况
职责描述:
1.Developanalog,mixedsignalandRFcircuits2.Perform
atransistorleveldesigntotapeout3.Supervisephysicallayoutwork4.Performdesigniterationbasedonpostsimulations.5.RequiresactiveparticipationintestchipsandcharacterizationofRFcircuits6.Supportsystemlevelintegrationandtesting.
任职要求:
1.ExperiencewithCadenceSpectreRF,Virtuoso,MentorCalibre2.ExcellentlabmeasurementtechniquesandreadingPCBschematics
3.FamiliaritywithRFFrontEndcircuits,PLL,ADCandDAC4.Excellentproblemsolvingandlabdebuggingskills5.Minimum3-yearspriorexperienceinCMOScircuitdesign
6.Strong?communication?skills?in?English
求职提醒:求职过程请勿缴纳费用,谨防诈骗!若信息不实请举报。